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442 lines
10 KiB
442 lines
10 KiB
/******************************************************************************
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* Copyright 2015 Espressif Systems
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*
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* Description: Assembly routines for the gdbstub
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*
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* License: ESPRESSIF MIT License
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*******************************************************************************/
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#include "gdbstub-cfg.h"
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#include <xtensa/config/specreg.h>
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#include <xtensa/config/core-isa.h>
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#include <xtensa/corebits.h>
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#define DEBUG_PC (EPC + XCHAL_DEBUGLEVEL)
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#define DEBUG_EXCSAVE (EXCSAVE + XCHAL_DEBUGLEVEL)
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#define DEBUG_PS (EPS + XCHAL_DEBUGLEVEL)
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.global gdbstub_savedRegs
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#if GDBSTUB_USE_OWN_STACK
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.global gdbstub_exceptionStack
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#endif
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ASATTR_GDBFN
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.literal_position
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ASATTR_GDBINIT
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.literal_position
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ASATTR_GDBFN
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.align 4
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/*
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The savedRegs struct:
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uint32_t pc;
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uint32_t ps;
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uint32_t sar;
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uint32_t vpri;
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uint32_t a0;
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uint32_t a[14]; //a2..a15
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uint32_t litbase;
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uint32_t sr176;
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uint32_t sr208;
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uint32_t a1;
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uint32_t reason;
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*/
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/*
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This is the debugging exception routine; it's called by the debugging vector
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We arrive here with all regs intact except for a2. The old contents of A2 are saved
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into the DEBUG_EXCSAVE special function register. EPC is the original PC.
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*/
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.type gdbstub_debug_exception_entry, @function
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gdbstub_debug_exception_entry:
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/*
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//Minimum no-op debug exception handler, for debug
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rsr a2,DEBUG_PC
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addi a2,a2,3
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wsr a2,DEBUG_PC
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xsr a2, DEBUG_EXCSAVE
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rfi XCHAL_DEBUGLEVEL
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*/
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//Save all regs to structure
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movi a2, gdbstub_savedRegs
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s32i a0, a2, 0x10
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s32i a1, a2, 0x14
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rsr a0, DEBUG_PS
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s32i a0, a2, 0x04
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rsr a0, DEBUG_EXCSAVE //was R2
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s32i a0, a2, 0x18
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s32i a3, a2, 0x1c
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s32i a4, a2, 0x20
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s32i a5, a2, 0x24
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s32i a6, a2, 0x28
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s32i a7, a2, 0x2c
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s32i a8, a2, 0x30
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s32i a9, a2, 0x34
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s32i a10, a2, 0x38
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s32i a11, a2, 0x3c
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s32i a12, a2, 0x40
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s32i a13, a2, 0x44
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s32i a14, a2, 0x48
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s32i a15, a2, 0x4c
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rsr a0, SAR
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s32i a0, a2, 0x08
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rsr a0, LITBASE
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s32i a0, a2, 0x50
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rsr a0, 176
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s32i a0, a2, 0x54
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rsr a0, 208
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s32i a0, a2, 0x58
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rsr a0, DEBUGCAUSE
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s32i a0, a2, 0x5C
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rsr a4, DEBUG_PC
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s32i a4, a2, 0x00
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#if GDBSTUB_USE_OWN_STACK
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//Move to our own stack
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movi a1, exceptionStack+255*4
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#endif
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//If ICOUNT is -1, disable it by setting it to 0, otherwise we will keep triggering on the same instruction.
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rsr a2, ICOUNT
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movi a3, -1
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bne a2, a3, noIcountReset
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movi a3, 0
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wsr a3, ICOUNT
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noIcountReset:
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rsr a2, ps
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addi a2, a2, -PS_EXCM_MASK
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wsr a2, ps
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rsync
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//Call into the C code to do the actual handling.
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call0 gdbstub_handle_debug_exception
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DebugExceptionExit:
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rsr a2, ps
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addi a2, a2, PS_EXCM_MASK
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wsr a2, ps
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rsync
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//Restore registers from the gdbstub_savedRegs struct
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movi a2, gdbstub_savedRegs
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l32i a0, a2, 0x00
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wsr a0, DEBUG_PC
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// l32i a0, a2, 0x58
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// wsr a0, 208
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l32i a0, a2, 0x54
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//wsr a0, 176 //Some versions of gcc do not understand this...
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.byte 0x00, 176, 0x13 //so we hand-assemble the instruction.
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l32i a0, a2, 0x50
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wsr a0, LITBASE
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l32i a0, a2, 0x08
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wsr a0, SAR
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l32i a15, a2, 0x4c
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l32i a14, a2, 0x48
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l32i a13, a2, 0x44
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l32i a12, a2, 0x40
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l32i a11, a2, 0x3c
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l32i a10, a2, 0x38
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l32i a9, a2, 0x34
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l32i a8, a2, 0x30
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l32i a7, a2, 0x2c
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l32i a6, a2, 0x28
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l32i a5, a2, 0x24
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l32i a4, a2, 0x20
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l32i a3, a2, 0x1c
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l32i a0, a2, 0x18
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wsr a0, DEBUG_EXCSAVE //was R2
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l32i a0, a2, 0x04
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wsr a0, DEBUG_PS
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l32i a1, a2, 0x14
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l32i a0, a2, 0x10
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//Read back vector-saved a2 value, put back address of this routine.
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movi a2, gdbstub_debug_exception_entry
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xsr a2, DEBUG_EXCSAVE
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//All done. Return to where we came from.
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rfi XCHAL_DEBUGLEVEL
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.size gdbstub_debug_exception_entry, .-gdbstub_debug_exception_entry
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#if GDBSTUB_BREAK_ON_EXCEPTION
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#if GDBSTUB_FREERTOS
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/*
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FreeRTOS exception handling code. For some reason or another, we can't just hook the main exception vector: it
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seems FreeRTOS uses that for something else too (interrupts). FreeRTOS has its own fatal exception handler, and we
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hook that. Unfortunately, that one is called from a few different places (eg directly in the DoubleExceptionVector)
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so the precise location of the original register values are somewhat of a mystery when we arrive here...
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As a 'solution', we'll just decode the most common case of the user_fatal_exception_handler being called from
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the user exception handler vector:
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- excsave1 - orig a0
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- a1: stack frame:
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sf+16: orig a1
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sf+8: ps
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sf+4: epc
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sf+12: orig a0
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sf: magic no?
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*/
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.global gdbstub_handle_user_exception
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.global gdbstub_user_exception_entry
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.type gdbstub_user_exception_entry, @function
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ASATTR_GDBFN
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.align 4
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gdbstub_user_exception_entry:
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//Save all regs to structure
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movi a0, gdbstub_savedRegs
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s32i a1, a0, 0x18 //was a2
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s32i a3, a0, 0x1c
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s32i a4, a0, 0x20
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s32i a5, a0, 0x24
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s32i a6, a0, 0x28
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s32i a7, a0, 0x2c
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s32i a8, a0, 0x30
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s32i a9, a0, 0x34
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s32i a10, a0, 0x38
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s32i a11, a0, 0x3c
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s32i a12, a0, 0x40
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s32i a13, a0, 0x44
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s32i a14, a0, 0x48
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s32i a15, a0, 0x4c
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rsr a2, SAR
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s32i a2, a0, 0x08
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rsr a2, LITBASE
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s32i a2, a0, 0x50
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rsr a2, 176
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s32i a2, a0, 0x54
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rsr a2, 208
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s32i a2, a0, 0x58
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rsr a2, EXCCAUSE
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s32i a2, a0, 0x5C
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//Get the rest of the regs from the stack struct
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l32i a3, a1, 12
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s32i a3, a0, 0x10
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l32i a3, a1, 16
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s32i a3, a0, 0x58
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l32i a3, a1, 8
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s32i a3, a0, 0x04
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l32i a3, a1, 4
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s32i a3, a0, 0x00
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#if GDBSTUB_USE_OWN_STACK
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movi a1, exceptionStack+255*4
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#endif
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rsr a2, ps
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addi a2, a2, -PS_EXCM_MASK
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wsr a2, ps
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rsync
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call0 gdbstub_handle_user_exception
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UserExceptionExit:
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/*
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Okay, from here on, it Does Not Work. There's not really any continuing from an exception in the
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FreeRTOS case; there isn't any effort put in reversing the mess the exception code made yet. Maybe this
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is still something we need to implement later, if there's any demand for it, or maybe we should modify
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FreeRTOS to allow this in the future. (Which will then kill backwards compatibility... hmmm.)
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*/
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j UserExceptionExit
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.size gdbstub_user_exception_entry, .-gdbstub_user_exception_entry
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.global gdbstub_handle_uart_int
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.global gdbstub_uart_entry
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.type gdbstub_uart_entry, @function
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ASATTR_GDBFN
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.align 4
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gdbstub_uart_entry:
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//On entry, the stack frame is at SP+16.
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//This is a small stub to present that as the first arg to the gdbstub_handle_uart function.
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movi a2, 16
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add a2, a2, a1
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movi a3, gdbstub_handle_uart_int
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jx a3
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.size gdbstub_uart_entry, .-gdbstub_uart_entry
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#endif
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#endif
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.global gdbstub_save_extra_sfrs_for_exception
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.type gdbstub_save_extra_sfrs_for_exception, @function
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ASATTR_GDBFN
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.align 4
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//The Xtensa OS HAL does not save all the special function register things. This bit of assembly
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//fills the gdbstub_savedRegs struct with them.
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gdbstub_save_extra_sfrs_for_exception:
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movi a2, gdbstub_savedRegs
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rsr a3, LITBASE
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s32i a3, a2, 0x50
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rsr a3, 176
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s32i a3, a2, 0x54
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rsr a3, 208
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s32i a3, a2, 0x58
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rsr a3, EXCCAUSE
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s32i a3, a2, 0x5C
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ret
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.size gdbstub_save_extra_sfrs_for_exception, .-gdbstub_save_extra_sfrs_for_exception
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.global gdbstub_init_debug_entry
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.global _DebugExceptionVector
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.type gdbstub_init_debug_entry, @function
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ASATTR_GDBINIT
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.align 4
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gdbstub_init_debug_entry:
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//This puts the following 2 instructions into the debug exception vector:
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// xsr a2, DEBUG_EXCSAVE
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// jx a2
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movi a2, _DebugExceptionVector
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movi a3, 0xa061d220
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s32i a3, a2, 0
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movi a3, 0x00000002
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s32i a3, a2, 4
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//Tell the just-installed debug vector where to go.
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movi a2, gdbstub_debug_exception_entry
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wsr a2, DEBUG_EXCSAVE
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ret
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.size gdbstub_init_debug_entry, .-gdbstub_init_debug_entry
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//Set up ICOUNT register to step one single instruction
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.global gdbstub_icount_ena_single_step
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.type gdbstub_icount_ena_single_step, @function
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ASATTR_GDBFN
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.align 4
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gdbstub_icount_ena_single_step:
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movi a3, XCHAL_DEBUGLEVEL //Only count steps in non-debug mode
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movi a2, -2
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wsr a3, ICOUNTLEVEL
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wsr a2, ICOUNT
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isync
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ret
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.size gdbstub_icount_ena_single_step, .-gdbstub_icount_ena_single_step
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//These routines all assume only one breakpoint and watchpoint is available, which
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//is the case for the ESP8266 Xtensa core.
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.global gdbstub_set_hw_breakpoint
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.type gdbstub_set_hw_breakpoint, @function
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ASATTR_GDBFN
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gdbstub_set_hw_breakpoint:
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//a2 - addr, a3 - len (unused here)
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rsr a4, IBREAKENABLE
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bbsi a4, 0, return_w_error
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wsr a2, IBREAKA
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movi a2, 1
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wsr a2, IBREAKENABLE
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isync
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movi a2, 1
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ret
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.size gdbstub_set_hw_breakpoint, .-gdbstub_set_hw_breakpoint
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.global gdbstub_del_hw_breakpoint
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.type gdbstub_del_hw_breakpoint, @function
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ASATTR_GDBFN
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gdbstub_del_hw_breakpoint:
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//a2 - addr
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rsr a5, IBREAKENABLE
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bbci a5, 0, return_w_error
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rsr a3, IBREAKA
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bne a3, a2, return_w_error
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movi a2,0
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wsr a2, IBREAKENABLE
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isync
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movi a2, 1
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ret
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.size gdbstub_del_hw_breakpoint, .-gdbstub_del_hw_breakpoint
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.global gdbstub_set_hw_watchpoint
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.type gdbstub_set_hw_watchpoint, @function
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ASATTR_GDBFN
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//a2 - addr, a3 - mask, a4 - type (1=read, 2=write, 3=access)
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gdbstub_set_hw_watchpoint:
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//Check if any of the masked address bits are set. If so, that is an error.
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movi a5,0x0000003F
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xor a5, a5, a3
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bany a2, a5, return_w_error
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//Check if watchpoint already is set
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rsr a5, DBREAKC
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movi a6, 0xC0000000
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bany a6, a5, return_w_error
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//Set watchpoint
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wsr a2, DBREAKA
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//Combine type and mask
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movi a6, 0x3F
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and a3, a3, a6
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slli a4, a4, 30
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or a3, a3, a4
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wsr a3, DBREAKC
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// movi a2, 1
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mov a2, a3
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isync
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ret
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.size gdbstub_set_hw_watchpoint, .-gdbstub_set_hw_watchpoint
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.global gdbstub_del_hw_watchpoint
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.type gdbstub_del_hw_watchpoint, @function
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ASATTR_GDBFN
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//a2 - addr
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gdbstub_del_hw_watchpoint:
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//See if the address matches
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rsr a3, DBREAKA
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bne a3, a2, return_w_error
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//See if the bp actually is set
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rsr a3, DBREAKC
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movi a2, 0xC0000000
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bnone a3, a2, return_w_error
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//Disable bp
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movi a2,0
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wsr a2,DBREAKC
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movi a2,1
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isync
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ret
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return_w_error:
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movi a2, 0
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ret
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.size gdbstub_del_hw_watchpoint, .-gdbstub_del_hw_watchpoint
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//Breakpoint, with an attempt at a functional function prologue and epilogue...
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.global gdbstub_do_break_breakpoint_addr
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.global gdbstub_do_break
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.type gdbstub_do_break, @function
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ASATTR_GDBFN
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.align 4
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gdbstub_do_break:
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addi a1, a1, -16
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s32i a15, a1, 12
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mov a15, a1
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gdbstub_do_break_breakpoint_addr:
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break 0,0
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mov a1, a15
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l32i a15, a1, 12
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addi a1, a1, 16
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ret
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.size gdbstub_do_break, .-gdbstub_do_break
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